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144
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HPCA
2009
IEEE
263
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Distributed And Parallel Com...
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HPCA 2009
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Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
16 years 3 months ago
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www.cse.psu.edu
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
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