Sciweavers

FCCM
1997
IEEE
129views VLSI» more  FCCM 1997»
14 years 3 months ago
The Chimaera reconfigurable functional unit
By strictly separating reconfigurable logic from their host processor, current custom computing systems suffer from a significant communication bottleneck. In this paper we descri...
Scott Hauck, Thomas W. Fry, Matthew M. Hosler, Jef...
IPPS
2006
IEEE
14 years 5 months ago
Exploiting programmable network interfaces for parallel query execution in workstation clusters
Workstation clusters equipped with high performance interconnect having programmable network processors facilitate interesting opportunities to enhance the performance of parallel...
V. Santhosh Kumar, Matthew J. Thazhuthaveetil, R. ...
HPCA
2001
IEEE
15 years 3 hour ago
Automatically Mapping Code on an Intelligent Memory Architecture
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
Jaejin Lee, Yan Solihin, Josep Torrellas