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    ASPDAC
    1999
    ACM
    113views Hardware» more  ASPDAC 1999»
    An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures
    13 years 11 months ago
    An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures
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    In this paper, we present a fast and efficient Iterative Improvement Partitioning (IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. Due to thei...
    C. K. Eem, J. W. Chong
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