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    ISVLSI
    2005
    IEEE
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    A High Performance Hybrid Wave-Pipelined Multiplier
    14 years 5 months ago
    A High Performance Hybrid Wave-Pipelined Multiplier
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    The clock period in conventional pipeline scheme is proportional to the maximum delay while in hybrid wave-pipelining it is proportional to the maximum delay difference. An 8×8-b...
    Suryanarayana Tatapudi, José G. Delgado-Fri...
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