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ASPDAC
2005
ACM
99views Hardware» more  ASPDAC 2005»
14 years 24 days ago
A fast counterexample minimization approach with refutation analysis and incremental SAT
- It is a hotly research topic to eliminate irrelevant variables from counterexample, to make it easier to be understood. BFL algorithm is the most effective Counterexample minim...
ShengYu Shen, Ying Qin, Sikun Li
VLSID
2007
IEEE
91views VLSI» more  VLSID 2007»
14 years 11 months ago
Reusing Learned Information in SAT-based ATPG
The robustness of engines for ATPG has to be improved to cope with the growing size of circuits. Recently, SAT-based ATPG approaches have been shown to be very robust even on larg...
Görschwin Fey, Rolf Drechsler, Tim Warode