Reusing Learned Information in SAT-based ATPG

The robustness of engines for ATPG has to be improved to cope with the growing size of circuits. Recently, SAT-based ATPG approaches have been shown to be very robust even on large industrial circuits. Here, we propose techniques to further improve the efficiency by embedding learning techniques in a SATbased ATPG engine. We provide a heuristic to apply incremental SAT when enumerating faults and a technique to apply circuit-based learning where incremental SAT is not applicable. The correctness of circuit-based learning is proven. Experimental results on large benchmarks show the efficiency.

• Type: Conference
• Year: 2007
• Where: VLSID
• Authors: Görschwin Fey, Rolf Drechsler, Tim Warode
• Keywords: Computer Architecture, Incremental Sat, Large Industrial Circuits, SAT-based ATPG Approaches, VLSID 2007