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ASPDAC
2006
ACM
100views Hardware» more  ASPDAC 2006»
14 years 5 months ago
Generation of shorter sequences for high resolution error diagnosis using sequential SAT
Commonly used pattern sources in simulation-based verification include random, guided random, or design verification patterns. Although these patterns may help bring the design ...
Sung-Jui (Song-Ra) Pan, Kwang-Ting Cheng, John Moo...
SYNASC
2006
IEEE
103views Algorithms» more  SYNASC 2006»
14 years 5 months ago
Incremental Deterministic Planning
We present a new planning algorithm that formulates the planning problem as a counting satisfiability problem in which the number of available solutions guides the planner determ...
Stefan Andrei, Wei-Ngan Chin, Martin C. Rinard