EUROMICRO
1998
IEEE
14 years 4 days ago
1998
IEEE
In this paper we present a novel processor microarchitecture that relieves three of the most important bottlenecks of superscalar processors: the serialization imposed by true dep...
IEEEPACT
1999
IEEE
14 years 4 days ago
1999
IEEE
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
ICPP
1999
IEEE
14 years 5 days ago
1999
IEEE
Instruction fetch bandwidth is feared to be a major limiting factor to the performance of future wide-issue aggressive superscalars. In this paper, we focus on Database applicatio...