—This paper presents a DAC architecture built on parallel current-steering sub-DAC entities. Two main novelties are explored: flexibility and smartness. Firstly, a number of avai...
Georgi I. Radulov, Patrick J. Quinn, Pieter Harpe,...
— The paper presents a new approach to the Volterra analysis of analog circuits. This kind of analysis is widely used for the calculation of distortion and intermodulation produc...
Ioannis Sarkas, Dimitrios Mavridis, Michail Papami...
Abstract— Approximation of Toeplitz matrices with circulant matrices is a well-known approach to reduce the computational complexity of linear equalizers. This paper presents a n...
Andreas Burg, Simon Haene, Wolfgang Fichtner, Mark...
— Increasing demands for robust image recognition systems require vision processors not only with enormous computational capacities but also with sufficient flexibility to hand...
Kota Yamaguchi, Yoshihiro Watanabe, Takashi Komuro...
— The work presented in this paper is about the design of current-controlled oscillators (ICO). Two ICOs are proposed. Aiming at reducing the duration of the short-circuit curren...
Energy recovery clocking has been demonstrated as an effective method for reducing the clock power. In this method the conventional square wave clock signal is replaced by a sinus...
This paper describes novel motion mapping algorithms aimed for low-complexity MPEG-2 to AVC transcoding. The proposed algorithms efficiently map incoming MPEG-2 motion vectors to...
Jun Xin, Jianjun Li, Anthony Vetro, Huifang Sun, S...
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
— Low-power consumption has become a highly important concern for synchronous standard-cell design, and consequently mandates the use of low-power design methodologies and techni...