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ISSS
2000
IEEE
102views Hardware» more  ISSS 2000»
14 years 3 months ago
Code Generation for Embedded Processors
Rainer Leupers
ISSS
2000
IEEE
109views Hardware» more  ISSS 2000»
14 years 3 months ago
Verification of Embedded Systems using a Petri Net based Representation
The ever increasing complexity of embedded systems consisting of hardware and software components poses a challenge in verifying their correctness, New verification methods that o...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...
ISSS
2000
IEEE
127views Hardware» more  ISSS 2000»
14 years 3 months ago
Lower Bound Estimation for Low Power High-Level Synthesis
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
Lars Kruse, Eike Schmidt, Gerd Jochens, Ansgar Sta...
ISSS
2000
IEEE
116views Hardware» more  ISSS 2000»
14 years 3 months ago
Scheduling Coarse-Grain Operations for VLIW Processors
Natalino G. Busá, Albert van der Werf, Marc...
ISSS
2000
IEEE
290views Hardware» more  ISSS 2000»
14 years 3 months ago
Mapping Array Communication onto FIFO Communication - Towards an Implementation
In high-throughput real-time media processing systems, the communication between processing units is typically specified as multi-dimensional arrays. However, the implementation ...
Jeffrey Kang, Albert van der Werf, Paul E. R. Lipp...
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
14 years 3 months ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
ISSS
2000
IEEE
94views Hardware» more  ISSS 2000»
14 years 3 months ago
A Transformational Approach to Constraint Relaxation of a Time-driven Simulation Model
Time-driven simulation models typically model timing in an idealized way that is over-constrained and cannot be directly implemented. In this paper we present a transformation to ...
Marek Jersak, Ying Cai, Dirk Ziegenbein, Rolf Erns...
ISSS
2000
IEEE
115views Hardware» more  ISSS 2000»
14 years 3 months ago
Battery-Driven Dynamic Power Management of Portable Systems
Luca Benini, Giuliano Castelli, Alberto Macii, Enr...
ISSS
2000
IEEE
111views Hardware» more  ISSS 2000»
14 years 3 months ago
Systematic Data Reuse Exploration Methodology for Irregular Access Patterns
Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption i...
Tanja Van Achteren, Rudy Lauwereins, Francky Catth...