Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
Heikki Orsila, Tero Kangas, Erno Salminen, Timo D....
This paper presents a scalable and partitionable asynchronous bus arbiter for use with chip multiprocessors (CMP) and its corresponding pre-layout simulation results using VHDL. T...
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Ch...
Holger Blume, Thorsten von Sydow, Daniel Becker, T...
Traditional design techniques for embedded systems apply transformations on the source code to optimize hardwarerelated cost factors. Unfortunately, such transformations cannot ad...
Marijn Temmerman, Edgar G. Daylight, Francky Catth...
In this paper, a new methodology is presented for topology optimization of networked embedded systems as they occur in automotive and avionic systems as well
Trivial instructions are those instructions whose output can be determined without performing the actual computation. This is due to the fact that for these instructions the outpu...