Sciweavers

LCTRTS
2007
Springer
14 years 5 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
LCTRTS
2007
Springer
14 years 5 months ago
Java takes flight: time-portable real-time programming with exotasks
Joshua S. Auerbach, David F. Bacon, Daniel T. Ierc...
LCTRTS
2007
Springer
14 years 5 months ago
Code and data partitioning for fine-grain parallelism
Michael L. Chu, Scott A. Mahlke
LCTRTS
2007
Springer
14 years 5 months ago
Scratchpad allocation for data aggregates in superperfect graphs
Existing methods place data or code in scratchpad memory, i.e., SPM by either relying on heuristics or resorting to integer programming or mapping it to a graph coloring problem. ...
Lian Li 0002, Quan Hoang Nguyen, Jingling Xue
LCTRTS
2007
Springer
14 years 5 months ago
Frequency-aware energy optimization for real-time periodic and aperiodic tasks
Energy efficiency is an important factor in embedded systems design. We consider an embedded system with a dynamic voltage scaling (DVS) capable processor and its system-wide pow...
Xiliang Zhong, Cheng-Zhong Xu
LCTRTS
2007
Springer
14 years 5 months ago
External memory page remapping for embedded multimedia systems
As memory speeds and bus capacitances continue to rise, external memory bus power will make up an increasing portion of the total system power budget for system-on-a-chip embedded...
Ke Ning, David R. Kaeli
LCTRTS
2007
Springer
14 years 5 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
LCTRTS
2007
Springer
14 years 5 months ago
Generalizing parametric timing analysis
In the design of real-time and embedded systems, it is important to establish a bound on the worst-case execution time (WCET) of programs to assure via schedulability analysis tha...
Joel Coffman, Christopher A. Healy, Frank Mueller,...
LCTRTS
2007
Springer
14 years 5 months ago
SWL: a search-while-load demand paging scheme with NAND flash memory
As mobile phones become increasingly multifunctional, the number and size of applications installed in phones are rapidly increasing. Consequently, mobile phones require more hard...
Jihyun In, Ilhoon Shin, Hyojun Kim
LCTRTS
2007
Springer
14 years 5 months ago
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration o
Industry’s demand for flexible embedded solutions providing high performance and short time-to-market has led to the development of configurable and extensible processors. The...
Richard Vincent Bennett, Alastair Colin Murray, Bj...