Sciweavers

ICCD
2001
IEEE
90views Hardware» more  ICCD 2001»
14 years 9 months ago
Interconnect-centric Array Architectures for Minimum SRAM Access Time
‡ Physical and generic models that analytically couple the array architecture of CMOS SRAMs with the wire lengths and fan-outs along critical paths to decode and sense data are r...
Azeez J. Bhavnagarwala, Stephen V. Kosonocky, Jame...