177
Voted
DATE
2007
IEEE
16 years 29 days ago
2007
IEEE
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in High Level Synthesis (HLS) unrolling can affect the contr...
156
Voted
ICASSP
2008
IEEE
16 years 1 months ago
2008
IEEE
In this paper, we propose a systemic approach for synthesizing field-programmable gate array (FPGA) implementations of fast Fourier transform (FFT) computations. Our approach cons...