Sciweavers

MEMOCODE
2010
IEEE
13 years 9 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler
MEMOCODE
2010
IEEE
13 years 9 months ago
ATLAS: Automatic Term-level abstraction of RTL designs
Bryan A. Brady, Randal E. Bryant, Sanjit A. Seshia...
MEMOCODE
2010
IEEE
13 years 9 months ago
Elastic systems
Elastic systems provide tolerance to the variations in computation and communication delays. The incorporation of elasticity opens new opportunities for optimization using new corr...
Jordi Cortadella, Marc Galceran Oms, Michael Kishi...
MEMOCODE
2010
IEEE
13 years 9 months ago
A regular expression matching using non-deterministic finite automaton
Abstract--This paper shows an implementation of CANSCID (Combined Architecture for Stream Categorization and Intrusion Detection). To satisfy the required system throughput, the pa...
Hiroshi Nakahara, Tsutomu Sasao, Munehiro Matsuura
MEMOCODE
2010
IEEE
13 years 9 months ago
Compilation of imperative synchronous programs with refined clocks
To overcome over-synchronization in synchronous programs, we recently introduced clock refinement to our synchronous programming language Quartz. This extension basically allows p...
Mike Gemunde, Jens Brandt, Klaus Schneider
MEMOCODE
2010
IEEE
13 years 9 months ago
Monitoring temporal SystemC properties
Monitoring temporal SystemC properties is crucial for the validation of functional and transaction-level models, yet the current SystemC standard provides no support for temporal s...
Deian Tabakov, Moshe Y. Vardi
MEMOCODE
2010
IEEE
13 years 9 months ago
FPGA-based combined architecture for stream categorization and intrusion detection
This paper presents a working solution for the MEMOCODE 2010 design contest. The design presented in this paper is implemented in the Xilinx V5LX330 FPGA as a custom circuit. The s...
Sunil Shukla, Rodric Rabbah, Martin Vorbach
MEMOCODE
2010
IEEE
13 years 9 months ago
Modular verification of synchronization with reentrant locks
We present a modular approach for verification of synchronization behavior in concurrent programs that use reentrant locks. Our approach decouples the verification of the lock impl...
Tevfik Bultan, Fang Yu, Aysu Betin-Can
MEMOCODE
2010
IEEE
13 years 9 months ago
Predictable multithreading of embedded applications using PRET-C
Sidharta Andalam, Partha S. Roop, Alain Girault
MEMOCODE
2010
IEEE
13 years 9 months ago
Feldspar: A domain specific language for digital signal processing algorithms
A new language, Feldspar, is presented, enabling high-level and platform-independent description of digital signal processing (DSP) algorithms. Feldspar is a pure functional langua...
Emil Axelsson, Koen Claessen, Gergely Dévai...