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42
Voted
HPCA
2009
IEEE
175
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Distributed And Parallel Com...
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HPCA 2009
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Dacota: Post-silicon validation of the memory subsystem in multi-core designs
15 years 19 days ago
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www.eecs.umich.edu
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
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