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115
Voted
FPL
2008
Springer
124views Hardware» more  FPL 2008»
15 years 6 months ago
Direct sigma-delta modulated signal processing in FPGA
The effectiveness of implementing bit-stream signal processing (BSSP) multiplier circuits in FPGAs, in terms of hardware resources and clock frequency, is presented. In particular...
Chiu-Wah Ng, Ngai Wong, Hayden Kwok-Hay So, Tung-S...
145
Voted
ICES
2003
Springer
124views Hardware» more  ICES 2003»
15 years 10 months ago
Evolving Multiplier Circuits by Training Set and Training Vector Partitioning
Evolvable Hardware (EHW) has been proposed as a new method for evolving circuits automatically. One of the problems appearing is that only circuits of limited size are evolvable. I...
Jim Torresen