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    IOLTS
    2006
    IEEE
    103views Hardware» more  IOLTS 2006»
    Designing Robust Checkers in the Presence of Massive Timing Errors
    14 years 6 months ago
    Designing Robust Checkers in the Presence of Massive Timing Errors
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    So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
    Frederic Worm, Patrick Thiran, Paolo Ienne
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