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23
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IEICET
2007
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IEICET 2007
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An Inhibitory Neural-Network Circuit Exhibiting Noise Shaping with Subthreshold MOS Neuron Circuits
14 years 12 days ago
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lalsie.ist.hokudai.ac.jp
We designed subthreshold analog MOS circuits implementing an inhibitory network model that performs noise-shaping pulse-density modulation with noisy neural elements. Our aim is t...
Akira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshi...
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