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33
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SBCCI
2006
ACM
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VLSI
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SBCCI 2006
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Power constrained design optimization of analog circuits based on physical gm/ID characteristics
14 years 6 months ago
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www.sbmicro.org.br
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
Alessandro Girardi, Sergio Bampi
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