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    ITC
    1999
    IEEE
    105views Hardware» more  ITC 1999»
    Finite state machine synthesis with concurrent error detection
    14 years 5 months ago
    Finite state machine synthesis with concurrent error detection
    Download  www-crc.stanford.edu
    A new synthesis technique for designing finite state machines with on-line parity checking is presented. The output logic and the next-state logic of the finite state machines are...
    Chaohuang Zeng, Nirmal R. Saxena, Edward J. McClus...
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