Sciweavers

ITC
1997
IEEE
129views Hardware» more  ITC 1997»
14 years 4 months ago
On Using Machine Learning for Logic BIST
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...
Christophe Fagot, Patrick Girard, Christian Landra...