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ISLPED
2010
ACM
205views Hardware» more  ISLPED 2010»
14 years 24 days ago
Peak power modeling for data center servers with switched-mode power supplies
Accurately modeling server power consumption is critical in designing data center power provisioning infrastructure. However, to date, most research proposals have used average CP...
David Meisner, Thomas F. Wenisch
EVOW
1999
Springer
14 years 4 months ago
Test Pattern Generation Under Low Power Constraints
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Re...
EMSOFT
2004
Springer
14 years 6 months ago
An approach for integrating basic retiming and software pipelining
Basic retiming is an algorithm originally developed for hardware optimization. Software pipelining is a technique proposed to increase instruction-level parallelism for parallel p...
Noureddine Chabini, Wayne Wolf
ICS
2005
Tsinghua U.
14 years 6 months ago
A performance-conserving approach for reducing peak power consumption in server systems
The combination of increasing component power consumption, a desire for denser systems, and the required performance growth in the face of technology-scaling issues are posing eno...
Wesley M. Felter, Karthick Rajamani, Tom W. Keller...
ISCA
2007
IEEE
168views Hardware» more  ISCA 2007»
14 years 6 months ago
Limiting the power consumption of main memory
The peak power consumption of hardware components affects their power supply, packaging, and cooling requirements. When the peak power consumption is high, the hardware components...
Bruno Diniz, Dorgival Olavo Guedes Neto, Wagner Me...
ICAC
2007
IEEE
14 years 7 months ago
Server-Level Power Control
We present a technique that controls the peak power consumption of a high-density server by implementing a feedback controller that uses precise, system-level power measurement to ...
Charles Lefurgy, Xiaorui Wang, Malcolm Ware
VLSID
2005
IEEE
121views VLSI» more  VLSID 2005»
15 years 29 days ago
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system compon...
Praveen Bhojwani, Rabi N. Mahapatra, Eun Jung Kim,...