Sciweavers

SEMWEB
2010
Springer
13 years 10 months ago
JustBench: A Framework for OWL Benchmarking
Analysing the performance of OWL reasoners on expressive OWL ontologies is an ongoing challenge. In this paper, we present a new approach to performance analysis based on justifica...
Samantha Bail, Bijan Parsia, Ulrike Sattler
SECON
2010
IEEE
13 years 10 months ago
Utility-Based Gateway Deployment for Supporting Multi-Domain DTNs
Abstract--Due to technology or policy constraints, communications across network domains usually require the intervention of gateways, and their proper deployment is crucial to the...
Ting He, Kang-Won Lee, Nikoletta Sofra, Kin K. Leu...
SECON
2010
IEEE
13 years 10 months ago
Managing TCP Connections in Dynamic Spectrum Access Based Wireless LANs
Wireless LANs have been widely deployed as edge access networks in home/office/commercial buildings, providing connection to the Internet. Therefore, performance of end-toend conne...
Ahwini Kumar, Kang G. Shin
PPSN
2010
Springer
13 years 10 months ago
Using Computational Intelligence to Identify Performance Bottlenecks in a Computer System
System administrators have to analyze a number of system parameters to identify performance bottlenecks in a system. The major contribution of this paper is a utility
Faraz Ahmed, Farrukh Shahzad, Muddassar Farooq
PIMRC
2010
IEEE
13 years 10 months ago
How to improve the performance in Delay Tolerant Networks under Manhattan Mobility Model
Delay Tolerant networks (DTNs) are one type of wireless networks where the number of nodes per unit area is small and hence the connectivity between the nodes is intermittent. In t...
Mouna Abdelmoumen, Eya Dhib, Mounir Frikha, Tijani...
MICRO
2010
IEEE
270views Hardware» more  MICRO 2010»
13 years 10 months ago
Many-Thread Aware Prefetching Mechanisms for GPGPU Applications
Abstract-- We consider the problem of how to improve memory latency tolerance in massively multithreaded GPGPUs when the thread-level parallelism of an application is not sufficien...
Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim...
MICRO
2010
IEEE
173views Hardware» more  MICRO 2010»
13 years 10 months ago
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
To extend the exponential performance scaling of future chip multiprocessors, improving energy efficiency has become a first-class priority. Single-chip heterogeneous computing ha...
Eric S. Chung, Peter A. Milder, James C. Hoe, Ken ...
MASCOTS
2010
13 years 10 months ago
Performance of Quantized Congestion Notification in TCP Incast Scenarios of Data Centers
This paper analyzes the performance of Ethernet layer congestion control mechanism Quantized Congestion Notification (QCN) during data access from clustered servers in data centers...
Prajjwal Devkota, A. L. Narasimha Reddy
LCTRTS
2010
Springer
13 years 10 months ago
Improving both the performance benefits and speed of optimization phase sequence searches
The issues of compiler optimization phase ordering and selection present important challenges to compiler developers in several domains, and in particular to the speed, code size,...
Prasad A. Kulkarni, Michael R. Jantz, David B. Wha...
LCTRTS
2010
Springer
13 years 10 months ago
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin,...