TC
2008
14 years 19 days ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
CANDC
2005
ACM
14 years 2 months ago
2005
ACM
This paper examines the development of wearable technologies that display a garment’s history of use and communicate physical memory. We explore how trends in digital technologi...
ASPLOS
1992
ACM
14 years 4 months ago
1992
ACM
Next generation computer systems will have gigabytes of physical memory and processors in the 200 MIPS range or higher. While this trend suggests that memory management for most p...
GRID
2004
Springer
14 years 6 months ago
2004
Springer
— Time sharing between all the users of a Grid is a major issue in cluster and Grid integration. Classical Grid architecture involves a higher level scheduler which submits non o...
CGO
2007
IEEE
14 years 7 months ago
2007
IEEE
Managed runtime environments (MREs) employ garbage collection (GC) for automatic memory management. However, GC induces pressure on the virtual memory (VM) manager, since it may t...
ICCAD
2007
IEEE
14 years 9 months ago
2007
IEEE
Abstract – The storage requirements in data-intensive signal processing systems (including applications in video and image processing, artificial vision, medical imaging, real-t...