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DATE
1999
IEEE
135views Hardware» more  DATE 1999»
14 years 4 months ago
Combinational Equivalence Checking Using Satisfiability and Recursive Learning
The problem of checking the equivalence of combinational circuits is of key significance in the verification of digital circuits. In recent years, several approaches have been pro...
João P. Marques Silva, Thomas Glass
MTV
2003
IEEE
154views Hardware» more  MTV 2003»
14 years 4 months ago
Tuning the VSIDS Decision Heuristic for Bounded Model Checking
Bounded Model Checking (BMC) techniques have been used for formal hardware verification, with the help of tools such as GRASP (Generic search Algorithm for Satisfiability Proble...
Ohad Shacham, Emmanuel Zarpas