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    MICRO
    2005
    IEEE
    126views Hardware» more  MICRO 2005»
    Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
    14 years 5 months ago
    Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
    Download  cccp.eecs.umich.edu
    Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
    Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
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