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28
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IWSOC
2005
IEEE
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IWSOC 2005
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Design and Optimization of Low-Voltage Low-Power Quasi-Floating Gate Digital Circuits
14 years 5 months ago
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This paper explores the design and optimization of Quasi-Floating Gate MOS techniques to lowvoltage/low-power digital circuitry. The simulated power consumption of standard CMOS g...
Kenneth A. Townsend, James W. Haslett, Krzysztof I...
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