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DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 4 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
DAC
2000
ACM
15 years 13 days ago
Designing systems-on-chip using cores
Leading-edge systems-on-chip (SoC) being designed today could reach 20 Million gates and 0.5 to 1 GHz operating frequency. In order to implement such systems, designers are increa...
Reinaldo A. Bergamaschi, William R. Lee