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    MICRO
    2005
    IEEE
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    Exploiting Vector Parallelism in Software Pipelined Loops
    14 years 5 months ago
    Exploiting Vector Parallelism in Software Pipelined Loops
    Download  groups.csail.mit.edu
    An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
    Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
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