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    ISLPED
    2003
    ACM
    91views Hardware» more  ISLPED 2003»
    Reducing reorder buffer complexity through selective operand caching
    14 years 4 months ago
    Reducing reorder buffer complexity through selective operand caching
    Download  www.cs.binghamton.edu
    Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
    Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad ...
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