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DATE
2003
IEEE
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Hardware
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DATE 2003
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SPIN: A Scalable, Packet Switched, On-Chip Micro-Network
14 years 4 months ago
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www.ee.unlv.edu
This paper presents the SPIN micro-network that is a generic, scalable interconnect architecture for system on chip. The SPIN architecture relies on packet switching and point-to-...
Adrijean Andriahantenaina, Hervé Charlery, ...
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