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ISPD
2012
ACM
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ISPD 2012
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Towards layout-friendly high-level synthesis
12 years 8 months ago
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cadlab.cs.ucla.edu
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
Jason Cong, Bin Liu 0006, Guojie Luo, Raghu Prabha...
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