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    2010
    ACM
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    Voter insertion algorithms for FPGA designs using triple modular redundancy
    14 years 7 months ago
    Voter insertion algorithms for FPGA designs using triple modular redundancy
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    Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...
    Jonathan M. Johnson, Michael J. Wirthlin
    claim paper
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