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DAC
1997
ACM
14 years 3 months ago
ISDL: An Instruction Set Description Language for Retargetability
Abstract—We present the Instruction Set Description Language, ISDL, a machine description language used to describe target architectures to a retargetable compiler. The features ...
George Hadjiyiannis, Silvina Hanono, Srinivas Deva...
DATE
1998
IEEE
68views Hardware» more  DATE 1998»
14 years 3 months ago
Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems
We present an approach to process scheduling based on an abstract graph representation which captures both dataflow and the flow of control. Target architectures consist of severa...
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa...
FCCM
2007
IEEE
101views VLSI» more  FCCM 2007»
14 years 5 months ago
Mapping Real Time Operating System on Reconfigurable Instruction Cell Based Architectures
This paper presents the porting of an RTOS Micro C/OS-II on a novel reconfigurable instruction cell based architecture which fills the gap between DSP, FPGA and ASIC with high per...
Han Wei, Mark Muir, Ioannis Nousias, Tughrul Arsla...
CGO
2009
IEEE
14 years 6 months ago
OptiScope: Performance Accountability for Optimizing Compilers
Compilers employ many aggressive code transformations to achieve highly optimized code. However, because of complex target architectures and unpredictable optimization interaction...
Tipp Moseley, Dirk Grunwald, Ramesh Peri