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    2006
    ACM
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    Efficient SAT-based Boolean matching for FPGA technology mapping
    14 years 11 months ago
    Efficient SAT-based Boolean matching for FPGA technology mapping
    Download  www.eecg.utoronto.ca
    Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
    Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
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