INTEGRATION
2007
13 years 11 months ago
2007
In this paper, we propose an efficient algorithm to reduce the voltage noises for on-chip power/ground (P/G) networks of VLSI. The new method is based on the sequence of linear p...
ISQED
2006
IEEE
14 years 5 months ago
2006
IEEE
— In this paper, we propose an efficient algorithm to reduce the voltage noises for on-chip power/ground (P/G) networks of VLSI. The new method is based on the sequence of linea...