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    TODAES
    2008
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    Synthesis of a novel timing-error detection architecture
    13 years 9 months ago
    Synthesis of a novel timing-error detection architecture
    Download  cad70.cs.nthu.edu.tw
    Yu-Shih Su, Po-Hsien Chang, Shih-Chieh Chang, Ting...
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    TODAES
    2008
    115views more  TODAES 2008»
    Automata-based assertion-checker synthesis of PSL properties
    13 years 10 months ago
    Automata-based assertion-checker synthesis of PSL properties
    Download  www.iml.ece.mcgill.ca
    Abstract-- Automata-based methods for generating PSL hardware assertion checkers were primarily considered for use with temporal sequences, as opposed to full-scale properties. We ...
    Marc Boule, Zeljko Zilic
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    TODAES
    2008
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    Layout-aware scan chain reorder for launch-off-shift transition test coverage
    13 years 10 months ago
    Layout-aware scan chain reorder for launch-off-shift transition test coverage
    Download  vlsilab.cs.nchu.edu.tw
    Sying-Jyan Wang, Kuo-Lin Peng, Kuang-Cyun Hsiao, K...
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    TODAES
    2008
    45views more  TODAES 2008»
    Timing-aware power-optimal ordering of signals
    13 years 10 months ago
    Timing-aware power-optimal ordering of signals
    Download  webee.technion.ac.il
    Konstantin Moiseev, Avinoam Kolodny, Shmuel Wimer
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    TODAES
    2008
    47views more  TODAES 2008»
    A retargetable parallel-programming framework for MPSoC
    13 years 10 months ago
    A retargetable parallel-programming framework for MPSoC
    Download  peace.snu.ac.kr
    Seongnam Kwon, Yongjoo Kim, Woo-Chul Jeun, Soonhoi...
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    TODAES
    2008
    158views more  TODAES 2008»
    Designing secure systems on reconfigurable hardware
    13 years 10 months ago
    Designing secure systems on reconfigurable hardware
    Download  cisr.nps.edu
    The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integ...
    Ted Huffmire, Brett Brotherton, Nick Callegari, Jo...
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    TODAES
    2008
    36views more  TODAES 2008»
    Implementing the scale vector-thread processor
    13 years 10 months ago
    Implementing the scale vector-thread processor
    Download  parlab.eecs.berkeley.edu
    Ronny Krashinsky, Christopher Batten, Krste Asanov...
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    TODAES
    2008
    49views more  TODAES 2008»
    Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
    13 years 10 months ago
    Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
    Download  www.es.ele.tue.nl
    Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesm...
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    TODAES
    2008
    79views more  TODAES 2008»
    Automatic verification of safety and liveness for pipelined machines using WEB refinement
    13 years 10 months ago
    Automatic verification of safety and liveness for pipelined machines using WEB refinement
    Download  www.ccs.neu.edu
    Panagiotis Manolios, Sudarshan K. Srinivasan
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    TODAES
    2008
    41views more  TODAES 2008»
    Power-aware SoC test planning for effective utilization of port-scalable testers
    13 years 10 months ago
    Power-aware SoC test planning for effective utilization of port-scalable testers
    Download  people.ee.duke.edu
    Anuja Sehgal, Sudarshan Bahukudumbi, Krishnendu Ch...
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