Sciweavers

    TVLSI
    2010
    223views Artificial Intelligence» more  TVLSI 2010»
    A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
    13 years 7 months ago
    A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
    Download  www.ece.ucdavis.edu
    A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
    Zhiyi Yu, Bevan M. Baas
    claim paper
    Read More »
    « first‹ previous1234
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.