FPGA-based synthesis tools require information about behaviour and architectural to make effective use of the limited number of cells typically available. A hardware description l...
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...
Modern VLSI processing supports a two-dimensional surface for active devices along with multiple stacked layers of interconnect. With the advent of planarization, the number of la...
In this paper we introduce a new approach to fault simulation, using reconfigurable hardware to implement a critical path tracing algorithm. Our performance estimate shows that ou...
This paper presents an architecture for generating a high-speed data pattern with precise edge placement resolution by using the matched delay technique. The technique involves ...
Gary C. Moyer, Mark Clements, Wentai Liu, Toby Sch...
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...