Sciweavers

ISLPED
2007
ACM
123views Hardware» more  ISLPED 2007»
14 years 2 months ago
A low-power SRAM using bit-line charge-recycling technique
We propose a new low-power SRAM using bit-line Charge Recycling (CR-SRAM) for the write operation. In the proposed write scheme, differential voltage swing of a bit-line is obtain...
Keejong Kim, Hamid Mahmoodi, Kaushik Roy
PDP
2002
IEEE
14 years 5 months ago
A Parametrized Algorithm that Implements Sequential, Causal, and Cache Memory Consistency
In this paper we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it has a ...
Ernesto Jiménez, Antonio Fernández, ...