ARITH 2009 - PDF Preprint Papers

ARITH 2009 IEEE Symposium on Computer Arithmetic

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ARITH
2009
IEEE

365views Applied Computing» more ARITH 2009»

IEEE 754-2008 Decimal Floating-Point for Intel

14 years 7 months ago

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A brief description is provided of the decimal floating-point support available for Intel® Architecture processors, compliant with the IEEE Standard 754-2008 for Floating-Point A...

Marius Cornea

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Id	Views	Title	Status

1	365	IEEE 754-2008 Decimal Floating-Point for Intel	claim
2	356	A New Binary Floating-Point Division Algorithm and Its Software Implementation on the ST231 Processor	claim
3	243	Fast and Accurate Bessel Function Computation	claim
4	242	Polynomial Multiplication over Finite Fields Using Field Extensions and Interpolation	claim
5	239	A Historical Perspective on Computer Arithmetic	claim
6	214	Hybrid Binary-Ternary Joint Form and Its Application in Elliptic Curve Cryptography	claim
7	197	Computation of Decimal Transcendental Functions Using the CORDIC Algorithm	claim
8	192	A 32-bit Decimal Floating-Point Logarithmic Converter	claim
9	183	Multi-operand Floating-Point Addition	claim
10	181	Implementation Specific Verification of Divide and Square Root Instructions	claim
11	177	Datapath Synthesis for Standard-Cell Design	claim
12	175	Fully Redundant Decimal Arithmetic	claim
13	174	Advanced Clockgating Schemes for Fused-Multiply-Add-Type Floating-Point Units	claim
14	173	A Dual-Purpose Real/Complex Logarithmic Number System ALU	claim
15	170	A Decimal Floating-Point Adder with Decoded Operands and a Decimal Leading-Zero Anticipator	claim
16	161	IEEE Interval Standard Working Group - P1788: Current Status	claim
17	158	Energy and Delay Improvement via Decimal Floating Point Units	claim
18	142	Unified Approach to the Design of Modulo-(2n +/- 1) Adders Based on Signed-LSB Representation of Residues	claim
19	132	Selected RNS Bases for Modular Multiplication	claim
20	132	On the Computation of Correctly-Rounded Sums	claim
21	131	Challenges in Automatic Optimization of Arithmetic Circuits	claim
22	130	Efficient Data Structure and Algorithms for Sparse Integers, Sets and Predicates	claim
23	128	A High-Performance Significand BCD Adder with IEEE 754-2008 Decimal Rounding	claim
24	119	Decimal Transcendentals via Binary	claim
25	107	Certified and Fast Computation of Supremum Norms of Approximation Errors	claim
26	104	Higher Radix Squaring Operations Employing Left-to-Right Dual Recoding	claim

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