Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off

We present a dynamic bit-width adaptation scheme in DCT applications for efficient trade-off between image quality and computation energy. Based on sensitivity differences of 64 DCT coefficients, various operand bit-widths are used for different frequency components to reduce computation energy in DCT operation. Numerical results show that our DCT architecture can achieve power savings ranging from 36 % to 75% compared to normal operation. 1 Background VLSI implementation of digital signal processing algorithms requires fixed-point arithmetic since floating point arithmetic needs more area and power consumption. When we determine the word length of a system, we should consider the trade-off between system performance and implementation cost [1]. In order to satisfy the power consumption, area constraint and system performance, accurate bitwidth selection is clearly required [2]. In this paper, we propose dynamic bit-width adaptation scheme in DCT applications for efficiently trad...

• Type: Conference
• Year: 2006
• Where: DATE
• Authors: Jongsun Park, Jung Hwan Choi, Kaushik Roy
• Keywords: DATE 2006, DCT Applications, DCT Coefficients, Frequency Dct Coefficients, Hardware