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GLVLSI
2006
IEEE

PWAM signalling scheme for high speed serial link transceiver design

14 years 5 months ago
PWAM signalling scheme for high speed serial link transceiver design
This paper presents a new signaling scheme called PWAM (pulse width and amplitude modulation) to obtain the optimum combination of bandwidth and performance of the serial link transceiver design by combining the conventional PWM(pulse width modulation) and PAM(pulse amplitude modulation) approach in the wire-line data transmission. For the number of voltage level M and the number of different pulse width N, the maximum bit rate of PWAM-(M×N) scheme improves to log2M + log2N times the symbol rate while the maximum bit rate of PAM-M and PWM-N are log2M and log2N times the symbol rate, respectively. Jitter analysis for PWAM scheme has been performed based on the low pass characteristic of the wire-line communication channel. Novel techniques are also proposed to compensate the channel loss of different symbols. The simulation demonstrates the effectiveness and novelty of the proposed scheme. Categories and Subject Descriptors B.4.1 [Input/Output Data Communications]: Data Communicati...
Rui Tang, Yong-Bin Kim
Added 11 Jun 2010
Updated 11 Jun 2010
Type Conference
Year 2006
Where GLVLSI
Authors Rui Tang, Yong-Bin Kim
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