In this paper a 173-bit type II ONB ECC processor Section II introduces the mathematical backgrounds for for inductive RFID applications is described. Compared with curve operations and field operations in ECC. The modified the standard mathematical expressions provided by [11, the mathematical expressions are deduced in this section, too. In formula expressions adopted in the design can save one field Section III the proposed architecture is discussed. After that, multiplication operation in the curve addition. Therefore, the the performance of the proposed processor is described in encryption/decryption time is reduced by approximately 7%. Section IV. Furthermore, the system level architecture of the ECC processor is specially structured and optimized, which makes it faster and less power consuming, and is more favorable for II. MATHEMATICAL BACKGROUND inductive RFID systems. Because ofthe tradeoffbetween the security level and the ease of hardware implementation, a non-supersingular...