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ISCAS
2006
IEEE

Multilevel flash memory on-chip error correction based on trellis coded modulation

14 years 5 months ago
Multilevel flash memory on-chip error correction based on trellis coded modulation
This paper presents a multilevel (ML) Flash memory onchip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivial modulation process in ML memory storage and the effectiveness of TCM on integrating coding with modulation to provide better performance. Using code storage 2bits/cell Flash memory as a test vehicle, the effectiveness of TCM-based systems, in terms of error-correcting performance, coding redundancy, silicon cost, and operation latency, has been successfully demonstrated.
Fei Sun, Siddharth Devarajan, Kenneth Rose, Tong Z
Added 12 Jun 2010
Updated 12 Jun 2010
Type Conference
Year 2006
Where ISCAS
Authors Fei Sun, Siddharth Devarajan, Kenneth Rose, Tong Zhang
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