A robust detailed placement for mixed-size IC designs

— The rapid increase in IC design complexity and wide-spread use of intellectual-property (IP) blocks have made the so-called mixed-size placement a very important topic in recent years. Although several algorithms have been proposed for mixed-sized placements, most of them primarily focus on the global placement aspect. In this paper we propose a three-step approach, named XDP, for mixed-size detailed placement. First, a combination of constraint graph and linear programming is used to legalize macros. Then, an enhanced greedy method is used to legalize the standard cells. Finally, a sliding-window-based cell swapping is applied to further reduce wirelength. The impact of individual techniques is analyzed and quantified. Experiments show that when applied to the set of global placement results generated by APlace [1], XDP can produce wirelength comparable to the native detailed placement of APlace, and 3% shorter wirelength compared to Fengshui 5.0 [2]. When applied to the set of g...

• Type: Conference
• Year: 2006
• Where: ASPDAC
• Authors: Jason Cong, Min Xie
• Keywords: ASPDAC 2006, Detailed Placement, Global Placement, Global Placement Aspect