A fast logic simulator using a look up table cascade emulator

— This paper shows a new type of a cycle-based logic simulation method using a Look-Up Table (LUT) cascade emulator. The method first transforms a given circuit into LUT cascades through BDD (Binary Decision Diagram). Then, it stores LUT data to the memory of an LUT cascade emulator. Next, it generates the C code representing the control circuit of the LUT cascade emulator. And, finally, it converts the C code into the execution code. This method is compared with a Levelized Compiled Code (LCC) simulator with respect to the simulation time and setup time. Although we used standard PC to simulate the circuit, experimental results show that this method is 12-64 times faster than the LCC.

• Type: Conference
• Year: 2006
• Where: ASPDAC
• Authors: Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura
• Keywords: ASPDAC 2006, LUT Cascade, LUT Cascade Emulator, LUT Data