Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

21

AICCSA
2005
IEEE

favoriteEmaildiscussreport

111views Hardware» more AICCSA 2005»

Acyclic circuit partitioning for path delay fault emulation

14 years 4 months ago

Acyclic circuit partitioning for path delay fault emulation

Download www.cse.unr.edu

Fatih Kocan, Mehmet Hadi Gunes

Real-time Traffic

AICCSA 2005 |

claim paper

Related Content

» Partial scan delay fault testing of asynchronous circuits

» Clock Grouping A Low Cost DFT Methodology for Delay Testing

» Particle swarmbased optimal partitioning algorithm for combinational CMOS circuits

» A Hybrid CompleteGraph PartialCrossbar Routing Architecture for MultiFPGA Systems

Post Info
More Details (n/a)

Added	24 Jun 2010
Updated	24 Jun 2010
Type	Conference
Year	2005
Where	AICCSA
Authors	Fatih Kocan, Mehmet Hadi Gunes

Comments (0)