ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement

Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-quality ISE generation approach needs to obtain results close to those achieved by experienced designers, particularly for complex applications that exhibit regularity: expert designers are able to exploit manually such regularity in the data flow graphs to generate high-quality ISEs. In this paper, we present ISEGEN, an approach that identifies high-quality ISEs by iterative improvement following the basic principles of the well-known KernighanLin (K-L) min-cut heuristic. Experimental results on a number of MediaBench, EEMBC and cryptographic applications show that our approach matches the quality of the optimal solution obtained by exhaustive search. We also show that our ISEGEN technique is on average ¾¼¢ faster than a genetic formulation that generates equivalent solutions. Furthermore, the ISEs identi�...

• Type: Conference
• Year: 2005
• Where: DATE
• Authors: Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne
• Keywords: Cryptographic Application, DATE 2005, Hardware, Instruction Set Extensions, ISEs